Simulation and modeling is indispensable for the design of electronic devices. As semiconductor microelectronic devices become ever smaller approaching the physical limits, simulation and modeling becomes increasingly important for the research and development of electronics industry. However, the existing simulation software tools for previous and present generation semiconductor devices and integrated circuits are no longer applicable to the emerging technology. The main difficulty lies in the limitation of continuum models used in the current simulation tools. For the sub-22nm devices, atomic features lead to large device-to-device variability. Another difficulty is that at the sub-22nm sizes the quantum effects, which are not adequately addressed in existing simulation tools, become important. Existing simulation tools cannot account for these effects, as they are all based on continuum models. Therefore, next generation simulation methods and software are urgently needed, and intensive research efforts are being carried out worldwide to develop such modeling and simulation technology. To learn and disseminate the latest research results of this rapidly developing field, we proposed to bring the world leading experts in the field of emerging electronics to share their works and knowledge with the researchers from Asia, Europe and North America. During the period of the workshop, we will learn and discuss with each other the latest developments of the field, contemplate new ideas and research directions, and explore the opportunities for potential collaborations among the scientists in this field.
According to the International Technology Roadmap for Semiconductors (ITRS) 2009, the DRAM feature size is projected to be 22 nm and the physical gate length 9 nm in 2016. There are enormous technological barriers to fabricate the sub-22nm devices in large scales lithography. Much remains unknown for the sub-22nm technology. This is the biggest and most difficult challenge that the semiconductor industry faces. Even with the projected improvements of current materials, processes and technologies, it is clear that the traditional geometric scaling alone will not be sufficient to achieve the goal of the industry in 2016 and beyond. Equivalent scaling that includes 3D device designs and new architectures as well as non-conventional technologies such as spintronics is thus essential. Moreover, the more-than-Moore or functional diversification approach has to be adopted. If for the near future FinFET or gate-all-around Si-nanowire technologies will probably be the solution, in the longer term novel devices and new materials will definitely need to be developed and employed. All these issues raise new challenges for industrial and as well as academic researchers in the field. For instance, will there be a paradigm shift in the fundamental working principles since devices become coherent? What is the mechanism for heat generation and dissipation? Is it possible to prevent current leakage through the oxide layer? What are the emerging devices? What are the emerging materials at sub-22nm scales? How is it possible to realize faster and low power consuming devices of few nanometers? These questions present many research challenges and opportunities for modeling and simulation in the field. The modeling and simulation tools for sub-22nm semiconductor technology must be of multi-scale characteristics  and cover vast research fields, including quantum transport, molecular electronics, circuit simulation, fast numerical algorithms, and spin electronics. It should be able to account for the atomistic details of devices and predict or simulate the performance of the integrated circuits of sub-22nm devices. First-principles quantum mechanical methods [2-5] can be used to calculate the physical properties of molecular electronic devices  and as well as these sub-22 nanometer devices and to simulate their dynamic responses with atomistic information. While first-principles methods for steady state currents through molecular and nano-scopic devices have been standardized , first-principles methods for transient currents are being developed. Algorithms based on wave function, [7, 8] Green’s function [5, 9-11] and density matrix  have been proposed. Density matrix approach is so far most efficient and has been used to simulate first-principles the transient current through a realistic nano-device containing hundreds of atoms . Circuit simulators, such as SPICE, BSIM  , ULTRA-MG [17, 18], can be used to simulate the electrical response of entire integrated circuits. There are quite extensive efforts in developing novel fast numerical algorithm [19, 20] and O(N) method[21-23]. For instance, a series of fast algorithms for solving electromagnetic scattering and inverse problems have been developed [19, 20], and the corresponding parallel codes have been employed to solve dense matrix systems with tens of millions of unknowns for the first time for integral equations of scattering, which has been used to simulate the propagation of electrical signals through integrated circuits.Spintronics, or spin electronics, involves the study of active control and manipulation of electron’s magnetic spin in materials. Recently, this field has been developing rapidly for its potential applications in electronic devices. [24-26]. As the size of transistors scales down to sub-22nm, new materials that are advantageous in terms of efficiency, reliability, and functionality are urgently sought for. In contrast to conventional silicon based semiconductors, new materials are expected to outperform in conductivity, efficiency, manipulability, reliability and variability. Promising candidates include III-V compound semiconductors, organic materials, carbon nanotubes, semiconductor nanowires, and graphene nanoribbons. However, knowledge on the fundamental physical properties of these materials is largely incomplete. This is partly due to the various limitations of the latest first-principles quantum-mechanical simulation tools, which make it a challenge for the quantitative prediction of nano-sized device performance.